From dd3ce4977e491028a9a1e4c4721f70b19cffb977 Mon Sep 17 00:00:00 2001
From: Nikolay Puzanov <np@embddr.xyz>
Date: Sun, 8 Feb 2026 13:55:07 +0300
Subject: [PATCH] Refactor: rename verilog-align-ports-* to verilog-align-*

---
 README.md                                     |  16 +--
 run-tests.sh                                  |   2 +-
 ...ign-ports-test.el => verilog-align-test.el |  30 ++--
 verilog-align-ports.el => verilog-align.el    | 130 +++++++++---------
 4 files changed, 89 insertions(+), 89 deletions(-)
 rename verilog-align-ports-test.el => verilog-align-test.el (90%)
 rename verilog-align-ports.el => verilog-align.el (78%)

diff --git a/README.md b/README.md
index c8e2222..beec92f 100644
--- a/README.md
+++ b/README.md
@@ -1,20 +1,20 @@
-# verilog-align-ports
+# verilog-align
 
-Align SystemVerilog ANSI-style port declarations in a contiguous block around point.
+Align SystemVerilog port declarations, instantiations, and signal declarations around point.
 
 ## Features
 
 - Aligns direction, type, range, name, and trailing `//` comments.
 - Works on the contiguous block of port declarations above and below point.
 - Stops at the first non-port line (including blank lines).
-- Aligns named port connections in module instantiations via `verilog-align-ports-instantiation`.
-- Aligns signal declarations via `verilog-align-ports-declarations`.
+- Aligns named port connections in module instantiations via `verilog-align-instantiation`.
+- Aligns signal declarations via `verilog-align-declarations`.
 
 ## Installation
 
 ```elisp
-(add-to-list 'load-path "/path/to/verilog-align-ports")
-(require 'verilog-align-ports)
+(add-to-list 'load-path "/path/to/verilog-align")
+(require 'verilog-align)
 ```
 
 ## Usage
@@ -25,12 +25,12 @@ Align SystemVerilog ANSI-style port declarations in a contiguous block around po
 For module instantiations:
 
 1. Place point on a named port connection line (e.g., `.clk_i (clk)` or `.full_o,`).
-2. Run `M-x verilog-align-ports-instantiation`.
+2. Run `M-x verilog-align-instantiation`.
 
 For signal declarations:
 
 1. Place point on a declaration line (e.g., `logic foo;` or `wire [3:0] bar;`).
-2. Run `M-x verilog-align-ports-declarations`.
+2. Run `M-x verilog-align-declarations`.
 
 Example input:
 
diff --git a/run-tests.sh b/run-tests.sh
index b0a7604..0a5b742 100755
--- a/run-tests.sh
+++ b/run-tests.sh
@@ -3,5 +3,5 @@ set -euo pipefail
 
 emacs -batch \
   -l ert \
-  -l verilog-align-ports-test.el \
+  -l verilog-align-test.el \
   -f ert-run-tests-batch-and-exit
diff --git a/verilog-align-ports-test.el b/verilog-align-test.el
similarity index 90%
rename from verilog-align-ports-test.el
rename to verilog-align-test.el
index 097f136..8a03a3d 100644
--- a/verilog-align-ports-test.el
+++ b/verilog-align-test.el
@@ -1,17 +1,17 @@
-;;; verilog-align-ports-test.el --- Tests for verilog-align-ports -*- lexical-binding: t; -*-
+;;; verilog-align-test.el --- Tests for verilog-align -*- lexical-binding: t; -*-
 
 ;;; Commentary:
-;; ERT tests for verilog-align-ports.
+;; ERT tests for verilog-align.
 
 ;;; Code:
 
 (require 'ert)
 
-(defconst verilog-align-ports-test--dir
+(defconst verilog-align-test--dir
   (file-name-directory (or load-file-name buffer-file-name)))
 
-(load-file (expand-file-name "verilog-align-ports.el"
-                             verilog-align-ports-test--dir))
+(load-file (expand-file-name "verilog-align.el"
+                             verilog-align-test--dir))
 
 (ert-deftest verilog-align-ports-aligns-block ()
   (let* ((input (concat
@@ -66,7 +66,7 @@
       (verilog-align-ports)
       (should (string= (buffer-string) expected)))))
 
-(ert-deftest verilog-align-ports-instantiation-aligns-block ()
+(ert-deftest verilog-align-instantiation-aligns-block ()
   (let* ((input (concat
                  (mapconcat
                   #'identity
@@ -121,10 +121,10 @@
       (goto-char (point-min))
       (search-forward ".clk_i")
       (beginning-of-line)
-      (should (verilog-align-ports-instantiation))
+      (should (verilog-align-instantiation))
       (should (string= (buffer-string) expected)))))
 
-(ert-deftest verilog-align-ports-instantiation-returns-nil-outside ()
+(ert-deftest verilog-align-instantiation-returns-nil-outside ()
   (with-temp-buffer
     (insert (concat
              (mapconcat
@@ -138,9 +138,9 @@
     (goto-char (point-min))
     (search-forward "dut (")
     (beginning-of-line)
-    (should (not (verilog-align-ports-instantiation)))))
+    (should (not (verilog-align-instantiation)))))
 
-(ert-deftest verilog-align-ports-declarations-aligns-block ()
+(ert-deftest verilog-align-declarations-aligns-block ()
   (let* ((input (concat
                  (mapconcat
                   #'identity
@@ -184,10 +184,10 @@
       (goto-char (point-min))
       (search-forward "logic full_o")
       (beginning-of-line)
-      (should (verilog-align-ports-declarations))
+      (should (verilog-align-declarations))
       (should (string= (buffer-string) expected)))))
 
-(ert-deftest verilog-align-ports-declarations-returns-nil-outside ()
+(ert-deftest verilog-align-declarations-returns-nil-outside ()
   (with-temp-buffer
     (insert (concat
              (mapconcat
@@ -200,8 +200,8 @@
     (goto-char (point-min))
     (search-forward "module foo")
     (beginning-of-line)
-    (should (not (verilog-align-ports-declarations)))))
+    (should (not (verilog-align-declarations)))))
 
-(provide 'verilog-align-ports-test)
+(provide 'verilog-align-test)
 
-;;; verilog-align-ports-test.el ends here
+;;; verilog-align-test.el ends here
diff --git a/verilog-align-ports.el b/verilog-align.el
similarity index 78%
rename from verilog-align-ports.el
rename to verilog-align.el
index f634859..2a8a67b 100644
--- a/verilog-align-ports.el
+++ b/verilog-align.el
@@ -1,14 +1,14 @@
-;;; verilog-align-ports.el --- Align SystemVerilog port declarations -*- lexical-binding: t; -*-
+;;; verilog-align.el --- Align SystemVerilog port declarations -*- lexical-binding: t; -*-
 
 ;;; Commentary:
-;; Align SystemVerilog ANSI-style port declarations in a contiguous block.
+;; Align SystemVerilog port declarations, instantiations, and signal declarations.
 
 ;;; Code:
 
 (require 'cl-lib)
 (require 'subr-x)
 
-(defun verilog-align-ports--line-port-p (pos)
+(defun verilog-align--line-port-p (pos)
   (save-excursion
     (goto-char pos)
     (let ((line (buffer-substring-no-properties
@@ -16,7 +16,7 @@
                  (line-end-position))))
       (string-match-p "^\\s-*\\(input\\|output\\|inout\\)\\b" line))))
 
-(defun verilog-align-ports--line-inst-port-p (pos)
+(defun verilog-align--line-inst-port-p (pos)
   (save-excursion
     (goto-char pos)
     (let ((line (buffer-substring-no-properties
@@ -26,7 +26,7 @@
        "^\\s-*\\.\\(\\\\[^[:space:]]+\\|[A-Za-z_][A-Za-z0-9_$]*\\)\\b"
        line))))
 
-(defun verilog-align-ports--line-decl-p (pos)
+(defun verilog-align--line-decl-p (pos)
   (save-excursion
     (goto-char pos)
     (let ((line (buffer-substring-no-properties
@@ -35,16 +35,16 @@
       (and (string-match-p
             "^\\s-*\\(logic\\|wire\\|reg\\)\\b"
             line)
-           (verilog-align-ports--parse-decl-line line)))))
+           (verilog-align--parse-decl-line line)))))
 
-(defun verilog-align-ports--split-comment (line)
+(defun verilog-align--split-comment (line)
   (let ((pos (string-match "//" line)))
     (if pos
         (cons (substring line 0 pos) (substring line pos))
       (cons line nil))))
 
-(defun verilog-align-ports--parse-line (line)
-  (let* ((split (verilog-align-ports--split-comment line))
+(defun verilog-align--parse-line (line)
+  (let* ((split (verilog-align--split-comment line))
          (code (string-trim-right (car split)))
          (comment (cdr split)))
     (when (string-match
@@ -86,67 +86,67 @@
               :comma comma
               :comment comment)))))
 
-(defun verilog-align-ports--bounds ()
+(defun verilog-align--bounds ()
   (save-excursion
-    (and (verilog-align-ports--line-port-p (line-beginning-position))
+    (and (verilog-align--line-port-p (line-beginning-position))
          (let ((start (line-beginning-position))
                (end nil))
            (while (and (not (bobp))
                        (save-excursion
                          (forward-line -1)
-                         (verilog-align-ports--line-port-p
+                         (verilog-align--line-port-p
                           (line-beginning-position))))
              (forward-line -1)
              (setq start (line-beginning-position)))
            (goto-char start)
            (while (and (not (eobp))
-                       (verilog-align-ports--line-port-p
+                       (verilog-align--line-port-p
                         (line-beginning-position)))
              (forward-line 1))
             (setq end (line-beginning-position))
             (cons start end)))))
 
-(defun verilog-align-ports--inst-bounds ()
+(defun verilog-align--inst-bounds ()
   (save-excursion
-    (and (verilog-align-ports--line-inst-port-p (line-beginning-position))
+    (and (verilog-align--line-inst-port-p (line-beginning-position))
          (let ((start (line-beginning-position))
                (end nil))
            (while (and (not (bobp))
                        (save-excursion
                          (forward-line -1)
-                         (verilog-align-ports--line-inst-port-p
+                         (verilog-align--line-inst-port-p
                           (line-beginning-position))))
              (forward-line -1)
              (setq start (line-beginning-position)))
            (goto-char start)
            (while (and (not (eobp))
-                       (verilog-align-ports--line-inst-port-p
+                       (verilog-align--line-inst-port-p
                         (line-beginning-position)))
              (forward-line 1))
             (setq end (line-beginning-position))
             (cons start end)))))
 
-(defun verilog-align-ports--decl-bounds ()
+(defun verilog-align--decl-bounds ()
   (save-excursion
-    (and (verilog-align-ports--line-decl-p (line-beginning-position))
+    (and (verilog-align--line-decl-p (line-beginning-position))
          (let ((start (line-beginning-position))
                (end nil))
            (while (and (not (bobp))
                        (save-excursion
                          (forward-line -1)
-                         (verilog-align-ports--line-decl-p
+                         (verilog-align--line-decl-p
                           (line-beginning-position))))
              (forward-line -1)
              (setq start (line-beginning-position)))
            (goto-char start)
            (while (and (not (eobp))
-                       (verilog-align-ports--line-decl-p
+                       (verilog-align--line-decl-p
                         (line-beginning-position)))
              (forward-line 1))
            (setq end (line-beginning-position))
            (cons start end)))))
 
-(defun verilog-align-ports--collect (start end)
+(defun verilog-align--collect (start end)
   (let (entries)
     (save-excursion
       (goto-char start)
@@ -154,13 +154,13 @@
         (let* ((line (buffer-substring-no-properties
                       (line-beginning-position)
                       (line-end-position)))
-               (entry (verilog-align-ports--parse-line line)))
+               (entry (verilog-align--parse-line line)))
           (when entry
             (push entry entries)))
         (forward-line 1)))
     (nreverse entries)))
 
-(defun verilog-align-ports--find-paren-end (text start)
+(defun verilog-align--find-paren-end (text start)
   (let ((depth 0)
         (idx start)
         (len (length text))
@@ -176,8 +176,8 @@
       (setq idx (1+ idx)))
     end))
 
-(defun verilog-align-ports--parse-inst-line (line)
-  (let* ((split (verilog-align-ports--split-comment line))
+(defun verilog-align--parse-inst-line (line)
+  (let* ((split (verilog-align--split-comment line))
          (code (string-trim-right (car split)))
          (comment (cdr split)))
     (when (string-match
@@ -192,7 +192,7 @@
              (conn "")
              (comma nil))
         (if (and pos (< pos (length rest)) (eq (aref rest pos) ?\())
-            (let* ((end (verilog-align-ports--find-paren-end rest pos)))
+            (let* ((end (verilog-align--find-paren-end rest pos)))
               (if end
                   (progn
                     (setq has-conn t)
@@ -216,8 +216,8 @@
               :comma comma
               :comment comment)))))
 
-(defun verilog-align-ports--parse-decl-line (line)
-  (let* ((split (verilog-align-ports--split-comment line))
+(defun verilog-align--parse-decl-line (line)
+  (let* ((split (verilog-align--split-comment line))
          (code (string-trim-right (car split)))
          (comment (cdr split)))
     (when (string-match
@@ -260,7 +260,7 @@
                     :tail tail
                     :comment comment))))))))
 
-(defun verilog-align-ports--inst-collect (start end)
+(defun verilog-align--inst-collect (start end)
   (let (entries)
     (save-excursion
       (goto-char start)
@@ -268,13 +268,13 @@
         (let* ((line (buffer-substring-no-properties
                       (line-beginning-position)
                       (line-end-position)))
-               (entry (verilog-align-ports--parse-inst-line line)))
+               (entry (verilog-align--parse-inst-line line)))
           (when entry
             (push entry entries)))
         (forward-line 1)))
     (nreverse entries)))
 
-(defun verilog-align-ports--decl-collect (start end)
+(defun verilog-align--decl-collect (start end)
   (let (entries)
     (save-excursion
       (goto-char start)
@@ -282,13 +282,13 @@
         (let* ((line (buffer-substring-no-properties
                       (line-beginning-position)
                       (line-end-position)))
-               (entry (verilog-align-ports--parse-decl-line line)))
+               (entry (verilog-align--parse-decl-line line)))
           (when entry
             (push entry entries)))
         (forward-line 1)))
     (nreverse entries)))
 
-(defun verilog-align-ports--max-lengths (entries)
+(defun verilog-align--max-lengths (entries)
   (let ((max-dir 0)
         (max-type 0)
         (max-range 0)
@@ -305,12 +305,12 @@
         (setq has-comment t)))
     (list max-dir max-type max-range max-name has-comment)))
 
-(defun verilog-align-ports--pad (max-len len)
+(defun verilog-align--pad (max-len len)
   (make-string (+ 1 (- max-len len)) ?\s))
 
-(defun verilog-align-ports--format-lines (entries)
+(defun verilog-align--format-lines (entries)
   (let* ((base-indent (plist-get (car entries) :indent))
-         (maxes (verilog-align-ports--max-lengths entries))
+         (maxes (verilog-align--max-lengths entries))
          (max-dir (nth 0 maxes))
          (max-type (nth 1 maxes))
          (max-range (nth 2 maxes))
@@ -326,13 +326,13 @@
               (name (concat (plist-get entry :name)
                             (or (plist-get entry :comma) "")))
               (comment (plist-get entry :comment))
-              (dir-pad (verilog-align-ports--pad max-dir (length dir)))
+              (dir-pad (verilog-align--pad max-dir (length dir)))
               (type-pad (when has-type
-                          (verilog-align-ports--pad max-type (length type))))
+                          (verilog-align--pad max-type (length type))))
               (range-pad (when has-range
-                           (verilog-align-ports--pad max-range (length range))))
+                           (verilog-align--pad max-range (length range))))
               (name-pad (when (and has-comment comment)
-                          (verilog-align-ports--pad max-name (length name)))))
+                          (verilog-align--pad max-name (length name)))))
          (concat base-indent
                  dir
                  dir-pad
@@ -345,7 +345,7 @@
                   (or comment ""))))
      entries)))
 
-(defun verilog-align-ports--inst-format-lines (entries)
+(defun verilog-align--inst-format-lines (entries)
   (let* ((base-indent (plist-get (car entries) :indent))
          (max-name 0)
          (has-comment nil)
@@ -363,7 +363,7 @@
              (conn (plist-get entry :conn))
              (comma (plist-get entry :comma))
              (pad (when has-conn
-                    (verilog-align-ports--pad max-name (length name-field))))
+                    (verilog-align--pad max-name (length name-field))))
              (left (concat base-indent
                            name-field
                            (when has-conn pad)
@@ -379,12 +379,12 @@
        (let ((comment (plist-get entry :comment)))
          (if (and has-comment comment)
              (concat left
-                     (verilog-align-ports--pad max-left (length left))
+                     (verilog-align--pad max-left (length left))
                      comment)
            left)))
      entries left-parts)))
 
-(defun verilog-align-ports--decl-format-lines (entries)
+(defun verilog-align--decl-format-lines (entries)
   (let* ((base-indent (plist-get (car entries) :indent))
          (max-type 0)
          (max-range 0)
@@ -402,9 +402,9 @@
                (range (plist-get entry :range))
                (name (plist-get entry :name))
                (tail (plist-get entry :tail))
-               (type-pad (verilog-align-ports--pad max-type (length type)))
+               (type-pad (verilog-align--pad max-type (length type)))
                (range-pad (when has-range
-                            (verilog-align-ports--pad max-range (length range))))
+                            (verilog-align--pad max-range (length range))))
                (left (concat base-indent
                              type
                              type-pad
@@ -421,12 +421,12 @@
          (let ((comment (plist-get entry :comment)))
            (if (and has-comment comment)
                (concat left
-                       (verilog-align-ports--pad max-left (length left))
+                      (verilog-align--pad max-left (length left))
                        comment)
              left)))
        entries left-parts))))
 
-(defun verilog-align-ports--apply (start lines)
+(defun verilog-align--apply (start lines)
   (save-excursion
     (goto-char start)
     (dolist (line lines)
@@ -438,44 +438,44 @@
 (defun verilog-align-ports ()
   "Align SystemVerilog port declarations around point."
   (interactive)
-  (let ((bounds (verilog-align-ports--bounds)))
+  (let ((bounds (verilog-align--bounds)))
     (and bounds
          (let* ((start (car bounds))
                  (end (cdr bounds))
-                 (entries (verilog-align-ports--collect start end)))
+                 (entries (verilog-align--collect start end)))
             (and entries
-                 (let ((lines (verilog-align-ports--format-lines entries)))
-                   (verilog-align-ports--apply start lines)
+                 (let ((lines (verilog-align--format-lines entries)))
+                   (verilog-align--apply start lines)
                    t))))))
 
 ;;;###autoload
-(defun verilog-align-ports-instantiation ()
+(defun verilog-align-instantiation ()
   "Align SystemVerilog named port connections around point."
   (interactive)
-  (let ((bounds (verilog-align-ports--inst-bounds)))
+  (let ((bounds (verilog-align--inst-bounds)))
     (and bounds
          (let* ((start (car bounds))
                 (end (cdr bounds))
-                (entries (verilog-align-ports--inst-collect start end)))
+                (entries (verilog-align--inst-collect start end)))
            (and entries
-                (let ((lines (verilog-align-ports--inst-format-lines entries)))
-                  (verilog-align-ports--apply start lines)
+                (let ((lines (verilog-align--inst-format-lines entries)))
+                  (verilog-align--apply start lines)
                   t))))))
 
 ;;;###autoload
-(defun verilog-align-ports-declarations ()
+(defun verilog-align-declarations ()
   "Align SystemVerilog signal declarations around point."
   (interactive)
-  (let ((bounds (verilog-align-ports--decl-bounds)))
+  (let ((bounds (verilog-align--decl-bounds)))
     (and bounds
          (let* ((start (car bounds))
                 (end (cdr bounds))
-                (entries (verilog-align-ports--decl-collect start end)))
+                (entries (verilog-align--decl-collect start end)))
            (and entries
-                (let ((lines (verilog-align-ports--decl-format-lines entries)))
-                  (verilog-align-ports--apply start lines)
+                (let ((lines (verilog-align--decl-format-lines entries)))
+                  (verilog-align--apply start lines)
                   t))))))
 
-(provide 'verilog-align-ports)
+(provide 'verilog-align)
 
-;;; verilog-align-ports.el ends here
+;;; verilog-align.el ends here