Nikolay Puzanov np

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• Joined on 2026-02-08

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hny-2026

Scala 0 0

A Chisel-based FPGA design that transmits a New Year's greeting message via LED patterns on a TangNano 1K development board.

Updated 2026-03-11 10:33:57 +03:00

azure-led-blink

Tcl 0 0

Минимальный пример для HP Azure X930613-001.

Updated 2026-03-11 10:26:49 +03:00

verilog-align-ports

Emacs Lisp 0 0

Elisp function for alignment SystemVerilog port declarations.

Updated 2026-02-08 22:56:46 +03:00