Nikolay Puzanov np
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  • Joined on 2021-01-06
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hny-2026
Scala 0 0
A Chisel-based FPGA design that transmits a New Year's greeting message via LED patterns on a TangNano 1K development board.
Updated 2026-01-10 20:42:45 +03:00
azure-led-blink
Tcl 0 0
Минимальный пример для HP Azure X930613-001.
Updated 2026-01-10 11:09:09 +03:00
uprintf
C 0 0
Simple printf replacement
Updated 2025-01-30 12:33:13 +03:00
simbench
Verilog 0 0
Simple HDL simulators benchmark
Updated 2025-01-10 11:01:57 +03:00
verilog-playground
Scheme 0 0
Templates for quick simulate Verilog code
Updated 2024-08-11 23:21:59 +03:00
embddr-scheme-library
Scheme 0 0
My useful scheme functions
Updated 2024-08-11 23:20:47 +03:00
random-phrase-generator
Scheme 0 0
Random phrase generator
Updated 2023-02-22 10:54:05 +03:00
hdl-unit-test-suite
Scheme 0 0
Simple HDL (only Verilog for now) unit-test tool
Updated 2022-09-13 15:52:24 +03:00
i2c-output-expander
SystemVerilog 0 0
Simple I2C Output expander
Updated 2022-06-14 12:51:59 +03:00
sugar-lissajous
SystemVerilog 0 0
Light organ on iCESugar board
Updated 2022-04-15 12:20:13 +03:00
worktimer
Scheme 0 0
Work time tracker
Updated 2022-04-15 12:06:41 +03:00
nbackbright
Nim 0 0
Simple tool for backlight brightness control
Updated 2022-04-15 12:06:32 +03:00
scheme-for-kids
Racket 0 0
Kids entertainment in Scheme
Updated 2022-04-15 12:06:10 +03:00