np/hdl-unit-test-suite
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Add additional verilog defines UTEST_*

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This commit is contained in:
Nikolay Puzanov 2022-07-12 18:43:38 +03:00
parent b5d2b12863
commit 905ff218f8
1 changed files with 19 additions and 5 deletions
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24
utest.scm
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@ -528,6 +528,24 @@
((find (lambda (x) (string-prefix? sim-warn-prefix x)) log) 'warning)
(else #t))))
;;;
;;; Return list of UTEST_* defines
;;;
(define (utest-verilog-defines)
(append
`((UTEST_BASE_DIR ,(format "'\"~a\"'" (utest/base-path)))
(UTEST_WORK_DIR ,(format "'\"~a\"'" (utest/work-path))))
(fold (lambda (x l)
(if (car x)
(append l (cdr x))
l))
'()
`((,(utest/verbose) UTEST_VERBOSE)
(,(utest/force-dump) UTEST_FORCE_DUMP)
(,(utest/keep-output) UTEST_KEEP_OUTPUT)
(,(utest/restart-dump) UTEST_RESTART_DUMP)))))
;;;
;;; Run compile and simulation with Icarus Verilog
;;;
@ -564,11 +582,7 @@
(let ((sources (append (map (lambda (x) (path->absolute x base-path))
(arg-to-list sources))
(list timeout-module dump-module)))
(defines (append defines
`((UTEST_BASE_DIR ,(format "'\"~a\"'" base-path))
(UTEST_WORK_DIR ,(format "'\"~a\"'" work-path)))))
(defines (append defines (utest-verilog-defines)))
(includes (append (map (lambda (x) (path->absolute x base-path)) (arg-to-list includes))
(list base-path)))