Rewrite run.sh script

test-xcelium/.dir-locals.el

@@ -0,0 +1 @@
+((verilog-mode . ((flycheck-verilator-include-path . ("../source")))))

test-xcelium/__build.sh

@@ -1,7 +1,11 @@
 #!/usr/bin/env bash
 set -e
 
+. ../scripts/sim_vars.sh
+
 rm -rf xcelium.d
 
-xmvlog -sv -f ../source/sources.f top.sv
-xmelab -timescale 1ps/1ps top
+## WARNING: defparam is not tested
+
+xmvlog -sv -f $FFILE top.sv
+xmelab -timescale 1ps/1ps -defparam top.CPU_COUNT=$CPU_COUNT top

test-xcelium/__run.sh

@@ -1,9 +1,5 @@
 #!/usr/bin/env bash
 
-if [ -n "$1" ]; then
-    dlen_arg="+dlen=$1"
-else
-    dlen_arg=""
-fi
+. ../scripts/sim_vars.sh
 
-xmsim -status top $dlen_arg
+xmsim -status top +dlen=$BLOCK_SIZE

test-xcelium/top.sv

@@ -1,7 +1,7 @@
 `timescale 1ps/1ps
 
-module top;
+module top #(parameter CPU_COUNT = 1024);
     logic clock = 1'b0;
     initial forever #(10ns/2) clock = ~clock;
-    testbench testbench (clock);
+    testbench #(CPU_COUNT) testbench (clock);
 endmodule