Add sources

test-iverilog/.dir-locals.el

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+((verilog-mode . ((flycheck-verilator-include-path . ("../source")))))

test-iverilog/.gitignore

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+top

test-iverilog/__build.sh

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+#!/usr/bin/env bash
+
+iverilog -g2012 -o top -f ../source/sources.f top.sv

test-iverilog/__run.sh

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+#!/usr/bin/env bash
+
+vvp -n ./top

test-iverilog/top.sv

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+`timescale 1ps/1ps
+
+module top;
+    logic clock = 1'b0;
+    initial forever #(10ns/2) clock = ~clock;
+    testbench testbench (clock);
+endmodule