Add XSIM

README.md

@@ -39,6 +39,7 @@
 Результаты для 200 знаков на том же процессоре:
 ```
     test-iverilog: 3257116
+    test-xsim: 938296
     test-modelsim: 359562
     test-verilator: 20816
 ```
@@ -53,6 +54,7 @@
     test-xcelium: 1
     test-vcs: 1.37
     test-modelsim: 5.95
+    test-xsim: 15.5
     test-iverilog: 58
 ```
 

test-xsim/.dir-locals.el

@@ -0,0 +1 @@
+((verilog-mode . ((flycheck-verilator-include-path . ("../source")))))

test-xsim/.gitignore

@@ -0,0 +1,4 @@
+webtalk*
+xsim.*
+xelab.*
+xvlog.*

test-xsim/__build.sh

@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+set -e
+
+FFILE=../source/sources.f
+SOURCES=$(cat $FFILE | sed -ze 's/\n/ /g')
+
+rm -rf xsim.dir
+rm -rf webtalk*
+rm -rf xvlog.* xelab.* xsim.*
+rm -rf top.wdb
+
+xvlog -work work --sv top.sv $SOURCES
+xelab --O3 -L work top

test-xsim/__run.sh

@@ -0,0 +1,4 @@
+#!/usr/bin/env bash
+
+#vsim -c -batch -voptargs=+acc=npr -do "run -all" -quiet -lib testbench top
+xsim top --runall

test-xsim/top.sv

@@ -0,0 +1,7 @@
+`timescale 1ps/1ps
+
+module top;
+    logic clock = 1'b0;
+    initial forever #(10ns/2) clock = ~clock;
+    testbench testbench (clock);
+endmodule