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Add iverilog results

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Nikolay Puzanov 2023-06-17 16:10:54 +03:00
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README.md
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@ -51,7 +51,7 @@
```
| Симулятор | Build | Run |
+-----------------------+----------+----------+
| Icarus Verilog | TBD | |
| Icarus Verilog | 00:00:27 | 19:04:37 |
| ModelSim | 00:00:00 | 01:33:14 |
| QuestaSim | 00:00:00 | 01:29:38 |
| Verilator (1 thread) | 00:12:03 | 00:02:57 |