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np
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verilog-playground
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verilog-playground
/
_web_server
/
server
History
Nikolay Puzanov
cc605cce85
Top module for all simulators must have an input clock signal
2022-12-09 10:21:40 +03:00
..
favicon.png
Fix content type of binary response. Add favicon
2022-12-02 18:46:42 +03:00
index.html
Disable Save hotkey (to prevent thoughtless use)
2022-12-09 10:13:03 +03:00
playground-server.scm
Top module for all simulators must have an input clock signal
2022-12-09 10:21:40 +03:00
restrict
Add Verilator support
2022-12-03 18:36:50 +03:00
top_iverilog.sv
Limit dump file size for Icarus Verilog
2022-12-03 23:53:03 +03:00
top_verilator.cpp
Add Verilator support
2022-12-03 18:36:50 +03:00
