Add -O5 option to QuestaSim. Rerun benchmarks.

This commit is contained in:
2025-01-09 12:54:21 +03:00
parent c277e3482a
commit 2821d98c6b
10 changed files with 76 additions and 32 deletions

View File

@@ -20,6 +20,6 @@ sed -i -e "s/CPU_COUNT = 1024/CPU_COUNT = $CPU_COUNT/" top-mod.sv
sources=$(cat $FFILE | grep -v "testbench.sv\|picorv32_tcm.sv")
sv2v --top=top -w simbench-all.v top-mod.sv testbench.sv picorv32_tcm.sv $sources
sed -i '1i `timescale 1ps/1ps' simbench-all.v
patch simbench-all.v simbench-all.patch
cvc64 -o top -O -pipe +large +nospecify simbench-all.v

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@@ -0,0 +1,20 @@
--- simbench-all.v 2025-01-08 22:09:06.737402979 +0300
+++ simbench-all.v1 2025-01-08 22:08:27.142909974 +0300
@@ -1,3 +1,4 @@
+`timescale 1ps/1ps
module top;
parameter CPU_COUNT = 1024;
reg clock = 1'b0;
@@ -13,10 +14,9 @@
wire [CPU_COUNT - 1:0] done_all;
reg signed [31:0] cycle = 0;
always @(posedge clock) cycle <= cycle + 1;
- genvar _gv_ncpu_1;
+ genvar ncpu;
generate
- for (_gv_ncpu_1 = 0; _gv_ncpu_1 < CPU_COUNT; _gv_ncpu_1 = _gv_ncpu_1 + 1) begin : cpus
- localparam ncpu = _gv_ncpu_1;
+ for (ncpu = 0; ncpu < CPU_COUNT; ncpu = ncpu + 1) begin : cpus
wire done;
reg done_ack = 1'b0;
wire reset;

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@@ -1,13 +1,13 @@
diff --git a/source/testbench.sv b/source/testbench.sv
index 1872eed..6f27f84 100644
index 2949591..084d7a3 100644
--- a/source/testbench.sv
+++ b/source/testbench.sv
@@ -32,7 +32,7 @@ module testbench #(parameter CPU_COUNT = 1024)
@@ -34,7 +34,7 @@ module testbench #(parameter CPU_COUNT = 1024)
data_len = DATA_LEN;
initial begin
reset = 1'b1;
- repeat($urandom % 5 + 2) @(posedge clock);
+ repeat($unsigned($random) % 5 + 2) @(posedge clock);
reset = 1'b0;
@(posedge clock);
int reset_duration;
- initial reset_duration = $urandom % CPU_COUNT + 2;
+ initial reset_duration = $unsigned($random) % CPU_COUNT + 2;
assign reset = cycle <= reset_duration;
always @(posedge clock) begin